The microcode is mostly irrelevant, and is also opaque. It might be doing something but Intel won't give you more details beyond the programmer's reference model.
"Microcode" generally looks more like expanding a CISC instruction into other instructions, rather than something that looks like a program.
Extremely low level paper: https://www.researchgate.net/publication/295010710_Booting_a... ; good to confirm that Intel systems still boot at 0xFFFFFF0 in real (16-bit!) mode. It also points out that microcode updates are applied after execution has started.
There is also the fun of "cache as RAM"; it's usually quite a time consuming operation to get the DRAM controller up and running and "trained" to the particular signal properties of the motherboard, so the early boot phase has no RAM.
"Microcode" generally looks more like expanding a CISC instruction into other instructions, rather than something that looks like a program.
Extremely low level paper: https://www.researchgate.net/publication/295010710_Booting_a... ; good to confirm that Intel systems still boot at 0xFFFFFF0 in real (16-bit!) mode. It also points out that microcode updates are applied after execution has started.
There is also the fun of "cache as RAM"; it's usually quite a time consuming operation to get the DRAM controller up and running and "trained" to the particular signal properties of the motherboard, so the early boot phase has no RAM.