IA64 is by far the most aggressive VLIW implementation we have. It was significantly ahead of its time, in that it relied on "sufficiently advanced compilers" that still haven't materialized. We'll get there eventually, and future architectures will push complexity into the compiler the way Itanium did when the compiler is able to bear the load. We're already there for easy-to-schedule, well-understood codes (e.g., ATI GPUs are VLIW), but I'm betting more Itanium-like microarchitecture will come out of the woodwork eventually.
In a sense, VLIW/EPIC was one of the only things IA64 was trying to do differently than existing architectures. The chips have a bunch of cool RAS features, but Power5-7 have most of those too.
In a sense, VLIW/EPIC was one of the only things IA64 was trying to do differently than existing architectures. The chips have a bunch of cool RAS features, but Power5-7 have most of those too.